Modern integrated circuits generally contain several layers of interconnect structures fabricated above a substrate. The substrate may have active devices and/or conductors that are connected by the interconnect structure.
Interconnect structures, typically comprising trenches and vias, are usually fabricated in, or on, an interlayer dielectric (ILD). It is generally accepted that, the dielectric material in each ILD should have a low dielectric constant (k) to obtain low capacitance between conductors. Decreasing this capacitance between conductors, by using a low dielectric constant, results in several advantages. For instance, it provides reduced RC delay, reduced power dissipation, and reduced cross-talk between the metal lines.
To obtain the desired low dielectric constant, porosity is often introduced into the dielectric material. These pores typically increase problems that inherently exist when further processing is done on dielectric material. For example copper formed in the trenches and vias, without a barrier, may diffuse into an underlying layer causing the shorting of adjacent copper lines or line-to-line leakage. Moreover, when vias and trenches are etched in the porous dielectric material, pores are often exposed on the surface of the dielectric. Therefore, interconnect structures employ a barrier layer over the surface of the dielectric to protect from copper diffusing into the dielectric material. Common materials used for this barrier layer are tantalum, tantalum nitride, tantalum carbide, and titanium nitride.
Yet, any discontinuity, like the discontinuities 130 in FIG. 1A, in the barrier film 120 will result in the diffusion of copper atoms or penetration of plating solution into the dielectric layer 110. This diffusion can also cause copper lines to short or induce electrical leakage from line-to-line to occur, as well as cause destruction of the dielectric layer 110. As shown in FIG. 1B, the prior art requires the deposition of a thicker barrier layer 140, typically greater than 30 nm, to physically cover the exposed pores and adequately protect the dielectric layer 110. Nevertheless, this thicker barrier layer 140 takes up additional volume in a via or a trench, which increases the line resistance by reducing the volume available for copper and adding series resistance to an underlying copper connection.
These integration challenges are also present in related art methods of sealing the exposed pores on the surface of dielectric materials. One technique requires the use of thin films of material, such as SiC, to seal the pores; yet, these thin films often take too much volume and increase the dielectric constant of the interconnect structure. Another technique requires the use of plasma gas, such as nitrogen, argon, or helium, to increase the density of the dielectric surface. Nevertheless, plasma is very directional, which makes deposition of a continuous film extremely difficult. This also results in a higher dielectric constant of film stack.